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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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ML6622CS 데이터시트(PDF) 2 Page - Micro Linear Corporation |
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ML6622CS 데이터시트(HTML) 2 Page - Micro Linear Corporation |
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2 / 6 page  2 ML6622 Micro Linear PIN DESCRIPTION PIN# NAME FUNCTION 1 ENABLE ECL input active low. When this input is tied to LINKLED the ECL comparator output is automatically enabled and disabled by the Link Detect circuit. This input can be tied to GND for continuous enable. When the ECL Comparator is disabled, ECL OUT– goes low and ECL OUT+ goes high. 2 LINKLED Link Detect Status output. LINKLED is an open collector active low signal. It will be active low when the input signal applied to VIN+,VIN– exceeds the programmed threshold level at the THIN pin. Capable of driving a 20mA LED indicator. 3VCC Positive Power Supply. +5 volts 4 ECL OUT+ Positive and Negative ECL Comparator 5 ECL OUT– outputs. 1mA internal pull downs are incorporated. 6 GND Ground connection. Used for less noise sensitive nodes. 7 LINK+ Positive ECL Link Detect output. Active high when the input signal exceeds the programmed Link Detect threshold. 1mA internal pull down current sources. 8 LINK – Negative ECL Link Detect output. Active low when the input signal exceeds the programmed Link Detect threshold. 1mA internal pull down current sources. 9VREF A 2.5V reference with respect to GND. NAME PIN # FUNCTION 10 THIN Threshold Input. A voltage applied to this input pin sets the minimum amplitude of the input signal required to cause the link detect to activate. In most cases this can be tied to VREF. 11 GNDA Ground connection for noise sensitive circuits in the chip; the input amplifier, DC restoration loop, part of the Comparator and part of the link detect circuit. In some system designs, it may be advantageous to separate GND and GNDA. 12 VIN– This input pin should be capacitively coupled to the input source or to VCCA. 13 VIN+ This input pin should be capacitively coupled to the input source or to VCCA. 14 VCCA Positive power supply VCC for noise sensitive circuits as mentioned in GNDA. +5 volts. 15 CAP A capacitor is tied from this pin to VREF. This capacitor sets the lower frequency rejection and helps remove internal DC offset. This capacitor should be 10 times larger than the input capacitors. 16 CTIMER A capacitor from this pin to ground determines the Link Detect response time. To Meet FDDI specifications this capacitor should be 2,000pF. This capacitor can be removed for faster response time. ML6622 16-Pin Narrow SOIC (S16N) PIN CONNECTION TOP VIEW ENABLE LINKLED VCC ECL OUT+ ECL OUT– GND LINK+ LINK– CTIMER CAP VCCA VIN+ VIN– GNDA THIN VREF 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 |
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