AS260 datasheet(13/45 Pages) ONSEMI

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AR0260 DS Rev. G Pub. 4/15 EN

©Semiconductor Components Industries, LLC,2015.

AR0260: 1/6-Inch 1080P High-Definition (HD) Digital Image Sensor

Power-Down Sequence

The output states during hard reset are shown in Table 7.

Soft Reset

The host processor can reset the AR0260 using the two-wire serial interface by writing to

SYSCTL 0x001A. SYSCTL 0x001A[0] is used to reset the AR0260 which is similar to

external RESET_BAR signal.

1. Set SYSCTL 0x001A[0] to 0x1 to initiate internal reset cycle.

2. Reset SYSCTL 0x001A[0] to 0x0 for normal operation.

3. Delay up to 35 ms, depending on EXTCLK frequency.

Figure 6:

Soft Reset Operation

Notes:

1. This delay is dependent on EXTCLK frequency.

Table 7:

Status of Output Signals During Hard Reset

Signal

Reset

DOUT[7:0]

High-Z

PIXCLK

High-Z

DATA_N

DATA_P

DATA_2N

DATA_2P

CLK_N

CLK_P

Table 8:

Soft Reset Signal Timing

Symbol

Parameter

Min

Typ

Max

Unit

Maximum soft reset time1

––

EXTCLK

SDATA

Mode

Write soft reset comand

Internal boot time

Enter standby mode

SCLK

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