A43L1616B datasheet(2/46 Pages) AMICC

2 / 46 page

A43L1616

Preliminary

1M X 16 Bit X 2 Banks Synchronous DRAM

PRELIMINARY

(February, 2008, Version 0.3)

AMIC Technology, Corp.

Features

Power supply

- VDD: 3.3V

VDDQ : 3.3V

LVTTL compatible with multiplexed address

Two banks / Pulse

RAS

MRS cycle with address key programs

- CAS Latency (2 & 3)

- Burst Length (1,2,4,8 & full page)

- Burst Type (Sequential & Interleave)

Clock Frequency (max) : 167MHz @ CL=3 (-6)

143MHz @ CL=3 (-7)

All inputs are sampled at the positive going edge of the

system clock

DQM for masking

Auto & self refresh

64ms refresh period (4K cycle)

Industrial operating temperature range: -40ºC to +85ºC

for -U series.

Available in 54 Balls CSP (8mm X 8mm) and 54-pin

TSOP(II) packages

Package is available to lead free (-F series)

All Pb-free (Lead-free) products are RoHS compliant

General Description

The A43L1616 is 33,554,432 bits synchronous high data

rate Dynamic RAM organized as 2 X 1,048,576 words by

16 bits, fabricated with AMIC’s high performance CMOS

technology. Synchronous design allows precise cycle

control with the use of system clock. I/O transactions are

possible on every clock cycle. Range of operating

frequencies, programmable latencies allows the same

device to be useful for a variety of high bandwidth, high

performance memory system applications.

Pin Configuration

54 Balls CSP (8 mm x 8 mm)

Top View

54 Ball (6X9) CSP

VSS

DQ15

VSSQ

VDDQ

DQ0

VDD

DQ14

DQ13

VDDQ

VSSQ

DQ2

DQ1

DQ12

DQ11

VSSQ

VDDQ

DQ4

DQ3

DQ10

DQ9

VDDQ

VSSQ

DQ6

DQ5

DQ8

VSS

VDD

LDQM

DQ7

UDQM

CLK

CKE

CAS

RAS

A10

VSS

VDD

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