SM5838AS datasheet(12/14 Pages) NPC

12 / 14 page

SM5838AS

NIPPON PRECISION CIRCUITS—12

1/2n data reduction (n

× n pixel reduction)

Screen resolution reduction, or 2

× 2 pixel reduction,

can be realized by combining both 1/2 data reduction

and 1/2 line extraction schemes. Furthermore, n

× n

pixel reduction (for integer n) can be realized by

changing the WE and RE disable intervals and the

RW and RR reset timing.

× 2 pixel reduction (1/4 reduction)

× 2 pixel reduction (mosaic)

*Output date 902 to 908 forms the preceding 1H data.

2 pixels

Valid

Invalid

0123 45

908

nH-2H

CLK

DOUT

DIN

nH+2H

012345

nH-1H

nH+1H

2 345

2345

0 1

909

2 pixels

Valid

0123 45

CLK

DOUT

DIN

nH+2H

909

908*

012345

nH-1H

nH+1H

2 345

2345

0 1

909

nH-2H

909

024

908

908*

908

Also, if the same data is repeatedly read out in place

of other data that has been discarded, the screen reso-

lution can be reduced without changing the data rate

to realize a mosaic ﬁlter function.

SM5838AS 데이터시트(PDF) 12 Page - Nippon Precision Circuits Inc

SM5838AS 데이터시트(HTML) 12 Page - Nippon Precision Circuits Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14

데이터시트 다운로드

링크 URL