| 전자부품 데이터시트 검색엔진 |
|
ACE4102E 데이터시트(PDF) 7 Page - ACE Technology Co., LTD. |
|
|
|||||||||||||||||||||||||||||
ACE4102E 데이터시트(HTML) 7 Page - ACE Technology Co., LTD. |
|
7 / 9 page ![]() ACE4102E 2.5A, 3MHz Switching Charger with Dynamic Power Path Management VER 1.1 7 PCB GUIDELINE PCB layout cautions of ACE4102E is shown below. The input capacitor (Cin) between Vin (Pin2) and PGND (Pin5) is always to be placed closest to the IC. SW wire can be laid through the gap between the 2 Cin terminals. It can go underneath the Cin. For all pins that needs to shorted to GND, please connect them to GND (Pin10), not to PGND (Pin5). A real PCB layout example is also listed below for reference. PCB cautions of ACE4102E Real DEMO board PCB for reference |
|
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |