| 전자부품 데이터시트 검색엔진 |
|
PLUTO 데이터시트(PDF) 8 Page - Mitel Networks Corporation |
|
|
|||||||||||||||||||||||||||||
PLUTO 데이터시트(HTML) 8 Page - Mitel Networks Corporation |
|
8 / 15 page ![]() 8 PLUTO PROGRAMMING and CONTROL The control modes for Pluto can be set via external pins or via a 3 wire serial interface. On initialising Pluto control is from external pins but can then be set for programming from the serial interface by setting the appropriate bit in a serial input word. The Rx second LO synthesiser is programmed via the serial interface: the Tx IF synthesiser is fixed and requires no programming. SLEEPB FMB IDLEB Mode (Pin 9) (Pin 7) (Pin 5) 0 X X Sleep Mode 1 0 0 FM Receive only 1 0 1 FM Receive and Transmit 1 1 0 CDMA Receive only 1 1 1 CDMA Receive and Transmit Mode Control - External The control modes are set by the pins SLEEPB, FMB and IDLEB as shown in the table below: Aux ADC Selection - External The auxiliary analog to digital converters can be selected via pins S0 and S1 as shown in the table below: S1 S0 ADC (Pin 39) (Pin 33) selected 0 0 ADC<0> 0 0 ADC<1> 1 0 ADC<2> 1 1 ADC<3> ADC selection can also be programmed to be via serial interface if required Serial Interface The 3 wire serial interface (SDATA, SCLK and SLATCH) is programmed using 24 bit words as shown below. Timing details are shown in Figure 8. MSB LSB 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9876543210 WORD1 00000 X X RXC RXDIV<13:0> 0 0 WORD2 SOP FMB IDB SLB 000000 AD1 AD0 TST 00000 MXS CTB 0001 X unused RXC RX Synth comparison frequency :0 = 30kHz, 1 = 5kHZ RXDIV<13:0> RX Synth divider ratio SOP External/ Serial mode selection: 0 = Ext, 1 = Serial SLB, IDB, FMB Sleep, Idle and FM mode control bits (serial mode) TST Test Mode Control - This is for test purposes only and should be set to 0 AD1, AD0 Aux ADC select bits (serial mode) MXS External / Serial Aux ADC select: 0 = Ext CTB Enable Rx Calibration: 0 = calibration mode If SOP is high mode control is via serial bits FMB, IDB and SLB, instead of external pins FMB, IDLEB and SLEEPB. If MXS is high then ADC selection is via AD1, AD0 instead of S<1>, S<0> |
|
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |