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PIC16F72/SS 데이터시트(PDF) 27 Page - Microchip Technology

부품명 PIC16F72/SS
상세설명  28-Pin, 8-Bit CMOS FLASH MCU with A/D Converter
PDF  136 Pages
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제조업체  MICROCHIP [Microchip Technology]
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 2002 Microchip Technology Inc.
DS39597B-page 25
PIC16F72
3.3
PORTC and the TRISC Register
PORTC is an 8-bit wide, bi-directional port. The corre-
sponding data direction register is TRISC. Setting a
TRISC bit (= 1) will make the corresponding PORTC
pin an input (i.e., put the corresponding output driver in
a Hi-Impedance mode). Clearing a TRISC bit (= 0) will
make the corresponding PORTC pin an output (i.e., put
the contents of the output latch on the selected pin).
PORTC is multiplexed with several peripheral functions
(Table 3-5). PORTC pins have Schmitt Trigger input
buffers.
When enabling peripheral functions, care should be
taken in defining TRIS bits for each PORTC pin. Some
peripherals override the TRIS bit to make a pin an out-
put, while other peripherals override the TRIS bit to
make a pin an input. Since the TRIS bit override is in
effect while the peripheral is enabled, read-modify-
write instructions (BSF, BCF, XORWF) with TRISC as
destination should be avoided. The user should refer to
the corresponding peripheral section for the correct
TRIS bit settings.
EXAMPLE 3-3:
INITIALIZING PORTC
FIGURE 3-5:
PORTC BLOCK DIAGRAM
(PERIPHERAL OUTPUT
OVERRIDE)
BANKSEL
PORTC
; Select Bank for PORTC
CLRF
PORTC
; Initialize PORTC by
; clearing output
; data latches
BANKSEL
TRISC
; Select Bank for TRISC
MOVLW
0xCF
; Value used to
; initialize data
; direction
MOVWF
TRISC
; Set RC<3:0> as inputs
; RC<5:4> as outputs
; RC<7:6> as inputs
Port/Peripheral Select(1)
Data
WR
Port
WR
TRIS
RD
Data Latch
TRIS Latch
RD TRIS
Schmitt
Trigger
Q
D
Q
CK
QD
EN
Peripheral Data Out
0
1
Q
D
Q
CK
P
N
VDD
VSS
Port
Peripheral
OE(2)
Peripheral Input
Note
1:
Port/Peripheral select signal selects
between port data and peripheral output.
2: Peripheral OE (output enable) is only
activated if peripheral select is active.
VSS
I/O
pin
VDD
Bus



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