전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

MTSF2P03HD 데이터시트(PDF) 7 Page - ON Semiconductor

부품명 MTSF2P03HD
상세설명  P?묬hannel Power MOSFET
PDF  12 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  ONSEMI [ON Semiconductor]
홈페이지  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

MTSF2P03HD 데이터시트(HTML) 7 Page - ON Semiconductor

Back Button MTSF2P03HD Datasheet HTML 3Page - ON Semiconductor MTSF2P03HD Datasheet HTML 4Page - ON Semiconductor MTSF2P03HD Datasheet HTML 5Page - ON Semiconductor MTSF2P03HD Datasheet HTML 6Page - ON Semiconductor MTSF2P03HD Datasheet HTML 7Page - ON Semiconductor MTSF2P03HD Datasheet HTML 8Page - ON Semiconductor MTSF2P03HD Datasheet HTML 9Page - ON Semiconductor MTSF2P03HD Datasheet HTML 10Page - ON Semiconductor MTSF2P03HD Datasheet HTML 11Page - ON Semiconductor Next Button
Zoom Inzoom in Zoom Outzoom out
 7 / 12 page
background image
MTSF2P03HD
http://onsemi.com
7
0.5
0.6
0.7
0
1
2
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 12. Diode Forward Voltage versus Current
VGS = 0 V
TJ = 25°C
0.8
0.9
3
t, TIME
Figure 13. Reverse Recovery Time (trr)
di/dt = 300 A/
µs
Standard Cell Density
High Cell Density
tb
trr
ta
trr
SAFE OPERATING AREA
The Forward Biased Safe Operating Area curve (Figure
14) defines the maximum simultaneous drain−to−source
voltage and drain current that a transistor can handle safely
when it is forward biased. Curves are based upon maximum
peak junction temperature and a case temperature (TC) of
25
°C. Peak repetitive pulsed power limits are determined by
using the thermal response data in conjunction with the
procedures discussed in AN569, “Transient Thermal
Resistance − General Data and Its Use.”
Switching between the off−state and the on−state may
traverse any load line provided neither rated peak current
(IDM) nor rated voltage (VDSS) is exceeded, and that the
transition time (tr, tf) does not exceed 10 µs. In addition the
total power averaged over a complete switching cycle must
not exceed (TJ(MAX) − TC)/(RθJC).
A power MOSFET designated E−FET can be safely used
in switching circuits with unclamped inductive loads. For
reliable operation, the stored energy from circuit inductance
dissipated in the transistor while in avalanche must be less
than the rated limit and must be adjusted for operating
conditions differing from those specified. Although industry
practice is to rate in terms of energy, avalanche energy
capability is not a constant. The energy rating decreases
non−linearly with an increase of peak current in avalanche
and peak junction temperature.
Although many E−FETs can withstand the stress of
drain−to−source avalanche at currents up to rated pulsed
current (IDM), the energy rating is specified at rated
continuous current (ID), in accordance with industry
custom. The energy rating must be derated for temperature
as shown in the accompanying graph (Figure 13). Maximum
energy at currents below rated continuous ID can safely be
assumed to equal the values indicated.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com