MN103SFM9K

32-bit Single-chip Microcontroller

Publication date: August 2014

5

PubNo. 232M9-010E

- Interval timer, trigger start 3-phase PWM, AD conversion start

- Count clock source

MCLK, MCLK/8, IOCLK, IOCLK/8, Timer 6 underflow, Timer 7 underflow

Timer 13 (16-bit timer for general use)

- Interval timer, trigger start 3-phase PWM, AD conversion start

- Count clock source

MCLK, MCLK/8, IOCLK, IOCLK/8, Timer 6 underflow, Timer 7 underflow

Timer 14 (8-bit timer for general use)

- Interval timer, Timer pulse output, Event count, Baud rate timer

- Count clock source

IOCLK, IOCLK/8, IOCLK/32, IOCLK/128, Timer 15 underflow, Timer 16 underflow,

TM14IO pin input

Timer 15 (8-bit timer for general use)

- Interval timer, Baud rate timer, Cascade connection function

- Count clock source

IOCLK, IOCLK/8, IOCLK/32, Timer 14 underflow, Timer 16 underflow

Timer 16 (8-bit timer for general use)

- Interval timer, Timer pulse output, Event count, Baud rate timer,

Cascade connection function

- Count clock source

IOCLK, IOCLK/8, IOCLK/32, IOCLK/128, Timer 14 underflow, Timer 15 underflow,

TM16IO pin input

Timer 17 (8-bit timer for general use)

- Interval timer, Timer pulse output, Event count, Cascade connection function

- Count clock source

IOCLK, IOCLK/8, IOCLK/32, TM17IO pin input,

Timer 14 underflow, Timer 15 underflow, Timer 16 underflow

Watchdog Timer

Detection time

6.55 ms to 1677.72 ms (oscillation frequency 10 MHz )

Generates non-maskable interrupts at detection

Generates hard-reset at second consecutive overflow

A /D Converter

A/D0

- Resolution

10 bits

- Minimum conversion time

1.0

μsec

- Channels

8 channels (ADIN00 to ADIN05, ADIN18, ADIN19)

- Use of 3 converters allows simultaneous sampling of 3 phases

- A/D conversion start trigger is in synchronization with complementary 3-phase PWM

cycle and 16-bit timer

A/D1

- Resolution

10 bits

- Minimum conversion time

1.0

μsec

- Channels

8 channels (ADIN02 to ADIN09)

- Use of 3 converters allows simultaneous sampling of 3 phases

- A/D conversion start trigger is in synchronization with complementary 3-phase PWM

cycle and 16-bit timer

A/D2