| 전자부품 데이터시트 검색엔진 |
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PCF7991AT 데이터시트(PDF) 13 Page - List of Unclassifed Manufacturers |
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PCF7991AT 데이터시트(HTML) 13 Page - List of Unclassifed Manufacturers |
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13 / 19 page ![]() printed 1998 Apr 20 13 Philips Semiconductors Product Specification (Rev. 1998 Apr 20) Advanced Basestation IC PCF7991AT Table 11 Configuration bit description Note 1. In order to achieve fast receiver settling the amplifier and filter characteristics can temporarily be overridden: 2. In order to derive an antenna carrier frequency fTX of 125 kHz; the clock divider has to be programmed as follows: 3. If the THRESET is set, the threshold generator is disabled and initialized according to the receive signal conditions. BIT NAME DESCRIPTION RESET CONDITION FILTERH main low pass cutoff frequency 0 0: fL = 3 kHz; 1: fL = 6 kHz FILTERL main high pass cutoff frequency 0 0: fH = 40 Hz; 1: fH = 160 Hz GAIN0 amplifier_0 gain factor 0 0: gain0 = 16; 1: gain0 = 32 GAIN1 amplifier_1 gain factor 1 0: gain1 = 6.22; 1: gain1 = 31.5 TXDIS disable antenna driver 0 0: driver active; 1: driver inactive HYSTERESIS data comparator hysteresis 0 0: hysteresis OFF; 1: hysteresis ON PD Power-down mode enable 0 0: device active; 1: Power-down mode PD_MODE select Power-down mode, if PD = 1 0 0: Idle mode; 1: Power-down mode FREEZE0 receiver characteristics override 0 see Note 1 FREEZE1 receiver characteristics override 0 see Note 1 ACQAMP store signal amplitude as reference for later amplitude comparison 0 see Section 8.5.5 THRESET reset threshold generation of digitizer 0 see Note 3 FSEL0 clock frequency select LSB 0 see Note 2 FSEL1 clock frequency select MSB 0 DISSMARTCOMP disable smart comparator 0 0: comparator = ON, 1: comparator = OFF DISLP1 disable main low pass 0 0: low pass = ON, 1: low pass = OFF FREEZE 1 FREEZE 0 REMARK 0 0 normal operation according to configuration page 0 0 1 main low pass is frozen and main high pass is initialized to QGND 1 0 main low pass is frozen and the time constant of the main high pass is reduced by a factor of 16 for FILTERH = 0 and by a factor of 8 for FILTERH = 1 1 1 time constant of the main high pass is reduced by a factor of 16 for FILTERH = 0 and by a factor of 8 for FILTERH = 1. Second high pass is initialized to QGND FSEL0 FSEL1 OSCILLATOR FREQUENCY 0 0 4 MHz 0 1 8 MHz 1 0 12 MHz 0 1 16 MHz |
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