TAS5548DCAR datasheet(5/116 Pages) TI1

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TAS5548

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SLES270A – NOVEMBER 2012 – REVISED APRIL 2015

Pin Functions (continued)

5-V

TYPE

TERMINATION

DESCRIPTION

TOLERANT

NAME

NO.

SDIN2-1

5 V

Pulldown

Serial-audio data bank 2 input 1 is one of the serial-data input ports and goes

into the 2nd SRC Bank. Four discrete (stereo) data formats and is capable of

inputting data at 64 fS.

SDIN2-2

5 V

Pulldown

Serial-audio data bank 2 input 2 is one of the serial-data input ports and goes

into the 2nd SRC Bank. Four discrete (stereo) data formats and is capable of

inputting data at 64 fS.

SDOUT / SDIN5

I2S data out or SDIN5 (must be sync'd to post SRC rate). Usually used for

Microphone ADC Input

TEST

Test mode active high. In normal mode tie this to digital ground.

VALID

Output indicating validity of PWM outputs, active-high

VR_DIG

Voltage reference for 1.8-V digital core supply. A pinout of the internally

regulated 1.8-V power used by digital core logic. A 4.7-

μF low-ESR capacitor

should be connected between this terminal and DVSS. This terminal must not

be used to power external devices.

VR_PWM

Voltage reference for 1.8-V digital PLL supply. A pinout of the internally

regulated 1.8-V power used by digital PLL logic. A 0.1-

μF low-ESR capacitor

should be connected between this terminal and DVSS_CORE. This terminal

must not be used to power external devices.

VR_ANA

Voltage reference for 1.8-V PLL analog supply. A pinout of the internally

regulated 1.8-V power used by PLL logic. A 0.1-µF low-ESR capacitor should be

connected between this terminal and AVSS_PLL. This terminal must not be

used to power external devices.

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