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2.3 Sign Output—TS1106 Only

The TS1106’s SIGN output indicates the load current’s direction. The SIGN output is a logic HIGH when M1 is conducting current (VRS

+ > VRS–). Alternatively, the SIGN output is a logic LOW when M2 is conducting current (VRS– > VRS+). The SIGN comparator’s

transfer characteristic is illustrated in the figure below. Unlike other current-sense amplifiers that implement an OUT/SIGN arrangement,

the TS1106 exhibits no “dead zone” at ILOAD switchover

Figure 2.3. TS1106 Sign Output Transfer Characteristic

2.4 Selecting a Sense Resistor

Selecting the optimal value for the external RSENSE is based on the following criteria, and commentary follows for each:

1. RSENSE Voltage Loss

2. VOUT Swing vs. Desired VSENSE and Applied Supply Voltage at VDD

3. Total ILOAD Accuracy

4. Circuit Efficiency and Power Dissipation

5. RSENSE Kelvin Connections

2.4.1 RSENSE Voltage Loss

For lowest IR power dissipation in RSENSE, the smallest usable resistor value for RSENSE should be selected.

2.4.2 VOUT Swing vs. Desired VSENSE and Applied Supply Voltage at VDD

Although the Current Sense Amplifier draws its power from the voltage at its RS+ and RS– terminals, the signal voltage at the OUT

terminal is provided by a buffer, and is therefore bounded by the buffer’s output range. As shown in the Electrical Characteristics table,

the CSA Buffer has a maximum and minimum output voltage of:

VOUT (max ) = VDD(min ) − 0.2V

VOUT (min ) = 0.2V

Therefore, the full-scale sense voltage should be chosen so that the OUT voltage is neither greater nor less than the maximum and

minimum output voltage defined above. To satisfy this requirement, the full-scale sense voltage, VSENSE(max), should be chosen so

that:

VSENSE(max ) <

VBIAS − VOUT (min )

GAIN

For best performance, RSENSE should be chosen so that the full-scale VSENSE is less than ±75 mV.

TS1105/06 Data Sheet

System Overview

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