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CAP1126 데이터시트(PDF) 14 Page - Microchip Technology

부품명 CAP1126
상세설명  6 Channel Capacitive Touch Sensor with 2 LED Drivers
PDF  73 Pages
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제조업체  MICROCHIP [Microchip Technology]
홈페이지  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

CAP1126 데이터시트(HTML) 14 Page - Microchip Technology

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CAP1126
DS00001623B-page 14
 2015 Microchip Technology Inc.
4.3.4
SMBUS RECEIVE BYTE
The Receive Byte protocol is used to read data from a register when the internal register address pointer is known to
be at the right location (e.g., set via Send Byte). This is used for consecutive reads of the same register as shown in
Table 4-6.
APPLICATION NOTE: The Receive Byte protocol is not functional in Deep Sleep (i.e., DSLEEP bit is set).
4.4
I2C Protocols
The CAP1126 supports I2C Block Write and Block Read.
The protocols listed below use the convention in Table 4-2.
4.4.1
BLOCK WRITE
The Block Write is used to write multiple data bytes to a group of contiguous registers as shown in Table 4-7.
APPLICATION NOTE: When using the Block Write protocol, the internal address pointer will be automatically
incremented after every data byte is received. It will wrap from FFh to 00h.
4.4.2
BLOCK READ
The Block Read is used to read multiple data bytes from a group of contiguous registers as shown in Table 4-8.
APPLICATION NOTE: When using the Block Read protocol, the internal address pointer will be automatically
incremented after every data byte is received. It will wrap from FFh to 00h.
4.5
SPI Interface
The SMBus has a predefined packet structure, the SPI does not. The SPI Bus can operate in two modes of operation,
normal 4-wire mode and bi-directional 3-wire mode. All SPI commands consist of 8-bit packets sent to a specific slave
device (identified by the CS pin).
The SPI bus will latch data on the rising edge of the clock and the clock and data both idle high.
All commands are supported via both operating modes. The supported commands are: Reset Serial interface, set
address pointer, write command and read command. Note that all other codes received during the command phase are
ignored and have no effect on the operation of the device.
TABLE 4-6:
RECEIVE BYTE PROTOCOL
Start
Slave Address
RD
ACK
Register Data
NACK
Stop
1 -> 0
YYYY_YYY
1
0
XXh
1
0 -> 1
TABLE 4-7:
BLOCK WRITE PROTOCOL
Start
Slave
Address
WR
ACK
Register
Address
ACK
Register Data
ACK
1 ->0
YYYY_YYY
0
0
XXh
0
XXh
0
Register Data
ACK
Register
Data
ACK
. . .
Register
Data
ACK
Stop
XXh
0
XXh
0
. . .
XXh
0
0 -> 1
TABLE 4-8:
BLOCK READ PROTOCOL
Start
Slave
Address
WR
ACK
Register
Address
ACK
Start
Slave
Address
RD
ACK
Register
Data
1->0
YYYY_YYY
0
0
XXh
0
1 ->0
YYYY_YYY
1
0
XXh
ACK
Register
Data
ACK
Register
Data
ACK
Register
Data
ACK
. . .
Register
Data
NACK
Stop
0
XXh
0
XXh
0
XXh
0
. . .
XXh
1
0 -> 1



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