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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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L7292 데이터시트(PDF) 56 Page - STMicroelectronics |
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L7292 데이터시트(HTML) 56 Page - STMicroelectronics |
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56 / 60 page  PCB design rules guideline L7292 56/60 DocID028601 Rev 1 13.4 General rules Do not share vias. Every component connecting to the power or the reference plane needs its own via. For large currents multiple vias are to be preferred. Vias shall be placed as close as possible to the component pin. Feedback nodes are sensitive. Keep them away from magnetic fields and nodes that may capacitive couple energy into them. 13.5 Thermal aspects The device package uses the center pad as a thermal conduit. This pad should be connected to an adequate spread of copper. When following the suggested layer stack the internal ground plane may be sufficient. If lots of other heat generating components are close by it may be necessary to create an exposed copper area on the backside of the board. The pad should be connected using multiple vias. |
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