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R5973AD 데이터시트(PDF) 11 Page - STMicroelectronics |
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R5973AD 데이터시트(HTML) 11 Page - STMicroelectronics |
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11 / 38 page ![]() DocID027027 Rev 1 11/38 R5973AD Functional description 38 Figure 4. Oscillator circuit block diagram Figure 5. Synchronization example 5.4 Current protection The R5973AD device features two types of current limit protection: pulse-by-pulse and frequency foldback. The schematic of the current limitation circuitry for the pulse-by-pulse protection is shown in Figure 6. The output power PDMOS transistor is split into two parallel PDMOS transistors. The smallest one includes a resistor in series, RSENSE. The current is sensed through RSENSE and if it reaches the threshold, the mirror becomes unbalanced and the PDMOS is switched off until the next falling edge of the internal clock pulse. Due to this reduction of the ON time, the output voltage decreases. Since the minimum switch ON time necessary to sense the current in order to avoid a false overcurrent signal is too short to obtain a sufficiently low duty cycle at 500 kHz (see Section 8.4 on page 26), the output current in |
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