| 전자부품 데이터시트 검색엔진 |
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R6986 데이터시트(PDF) 25 Page - STMicroelectronics |
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R6986 데이터시트(HTML) 25 Page - STMicroelectronics |
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25 / 62 page ![]() DocID026996 Rev 2 25/62 R6986 Functional description 62 5.5 Light load operation The MLF pinstrapping during the power-up phase determines the light load operation (refer to Table 7: LNM / LCM selection on page 12). 5.5.1 Low noise mode (LNM) The low noise mode implements a forced PWM operation over the different loading conditions. The LNM features a constant switching frequency to minimize the noise in the final application and a constant voltage ripple at fixed VIN. The regulator in steady loading condition never skip pulses and it operates in continuous conduction mode (CCM) over the different loading conditions. Figure 13. Low noise mode operation 5.5.2 Low consumption mode (LCM) The low consumption mode maximizes the efficiency at light load. The regulator prevents the switching activity whenever the switch peak current request is lower than the ISKIP threshold (700 mA typical). As a consequence the R6986 device works in bursts and it minimizes the quiescent current request in the meantime between the switching operation. In order to minimize the regulator quiescent current request from the input voltage, the VBIAS pin can be connected to an external voltage source in the range 3 V < VBIAS < 5.5 V (see Section 5.1: Power supply and voltage reference on page 15). In case the VBIAS pin is connected to the regulated output voltage (VOUT), the total current drawn from the input voltage can be calculated as Equation 14. |
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