ADC0804LCWM datasheet(14/56 Pages) TI1

14 / 56 page

ADC0801, ADC0802, ADC0803, ADC0804, ADC0805

SNOSBI1C – NOVEMBER 2009 – REVISED JUNE 2015

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Feature Description (continued)

8.3.2 Digital Control Inputs

The digital control inputs (CS, RD, and WR) meet standard TLL logic voltage levels. These signals have been

renamed when compared to the standard ADC Start and Output Enable labels. In addition, these inputs are

active low to allow an easy interface to microprocessor control busses. For non-microprocessor based

applications, the CS input (pin 1) can be grounded and the standard ADC Start function is obtained by an active

low pulse applied at the WR input (pin 3) and the Output Enable function is caused by an active low pull at the

RD input (pin 2).

8.4 Device Functional Modes

8.4.1 Analog Input Modes

8.4.1.1 Normal Mode

Due to the internal switching action, displacement currents will flow at the analog inputs. This is due to on-chip

stray capacitance to ground as shown in Figure 22.

rON of SW 1 and SW 2.5 kΩ

r=rON CSTRAY × 5 kΩ x 12 pF = 60 ns

Figure 22. Analog Input Impedance

The voltage on this capacitance is switched and will result in currents entering the VIN(+) input pin and leaving

the VIN(−) input which will depend on the analog differential input voltage levels. These current transients occur

at the leading edge of the internal clocks. They rapidly decay and do not cause errors as the on-chip comparator

is strobed at the end of the clock period.

8.4.1.2 Fault Mode

If the voltage source applied to the VIN(+) or VIN(−) pin exceeds the allowed operating range of VCC+50 mV, large

input currents can flow through a parasitic diode to the VCC pin. If these currents can exceed the 1 mA max

allowed spec, an external diode (1N914) should be added to bypass this current to the VCC pin (with the current

bypassed with this diode, the voltage at the VIN(+) pin can exceed the VCC voltage by the forward voltage of this

diode).

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