M93S46-W M93S56-W M93S66-W

Instructions

DocID5124 Rev 7

13/32

1.

For the meanings of An and Qn, see Table 2: "Instruction set for the M93S46" and

Table 3: "Instruction set for the M93S66, M93S56".

Figure 5: WRITE sequence

1.

For the meanings of An and Dn, see Table 2: "Instruction set for the M93S46" and

Table 3: "Instruction set for the M93S66, M93S56".

Figure 6: WEN and WDS sequences

1.

For the meanings of Xn, see Table 2: "Instruction set for the M93S46" and Table 3:

"Instruction set for the M93S66, M93S56".

5.3

Write to memory array (WRITE)

The Write Data to Memory instruction is composed of the Start bit plus the op-code

followed by the address and the 16 data bits to be written.

Write Enable (W) must be held High before and during the instruction. Input address and

data, on Serial Data Input (D) are sampled on the rising edge of Serial Clock (C).

MSv36052V1

S

WRITE

1 0

An

A0

DATA IN

D

Q

OP

CODE

Dn

D0

1

BUSY

READY

CHECK

STATUS

ADDR

PRE

W

MSv36053V1

S

WRITE

ENABLE

1

0

Xn X0

D

OP

CODE

1

0

1

S

WRITE

DISABLE

1

0

Xn X0

D

OP

CODE

0

0

0

PRE

W

PRE