전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

STGIPS40W60L1 데이터시트(PDF) 15 Page - STMicroelectronics

부품명 STGIPS40W60L1
상세설명  Dead time and interlocking function
PDF  21 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STGIPS40W60L1 데이터시트(HTML) 15 Page - STMicroelectronics

Back Button STGIPS40W60L1 Datasheet HTML 11Page - STMicroelectronics STGIPS40W60L1 Datasheet HTML 12Page - STMicroelectronics STGIPS40W60L1 Datasheet HTML 13Page - STMicroelectronics STGIPS40W60L1 Datasheet HTML 14Page - STMicroelectronics STGIPS40W60L1 Datasheet HTML 15Page - STMicroelectronics STGIPS40W60L1 Datasheet HTML 16Page - STMicroelectronics STGIPS40W60L1 Datasheet HTML 17Page - STMicroelectronics STGIPS40W60L1 Datasheet HTML 18Page - STMicroelectronics STGIPS40W60L1 Datasheet HTML 19Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 15 / 21 page
background image
STGIPS40W60L1
Smart shutdown function
Doc ID 018866 Rev 3
15/21
4
Smart shutdown function
The STGIPS40W60L1 integrates a comparator for fault sensing purposes. The comparator
non-inverting input (CIN) can be connected to an external shunt resistor in order to
implement a simple overcurrent protection function. When the comparator triggers, the
device is set in shutdown state and both its outputs are set to low-level leading the half-
bridge in tri-state. In the common overcurrent protection architectures the comparator output
is usually connected to the shutdown input through a RC network, in order to provide a
mono-stable circuit, which implements a protection time that follows the fault condition.
Our smart shutdown architecture allows to immediately turn-off the output gate driver in
case of overcurrent, the fault signal has a preferential path which directly switches off the
outputs. The time delay between the fault and the outputs turn-off is no more dependent on
the RC values of the external network connected to the shutdown pin. At the same time the
internal logic turns on the open-drain output and holds it on until the shutdown voltage goes
below the logic input lower threshold. Finally the smart shutdown function provides the
possibility to increase the real disable time without increasing the constant time of the
external RC network.
Figure 9.
Smart shutdown timing waveforms
Pls refer to
Table 12 for internal propagation delay time details.
HIN/LIN
HVG/LVG
SD/OD
open drain gate
(internal)
upper
threshold
lower
threshold
comp
Vref
CP+
PROTECTION
Fast shut down:
the driver outputs are set in SD state
immediately after the comparator
triggering even if the SD signal
has not yet reach
the lower input threshold
real disable time
2
1
1
2
= (RON_OD // RSD) CSD
= RSD CSD
SD/OD
FROM/TO
CONTROLLER
VBIAS
SMART
SD
LOGIC
CSD
RSD
RON_OD
SHUT DOWN CIRCUIT
TIME CONSTANTS



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com