M95M01-125 datasheet(23/37 Pages) STMICROELECTRONICS

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M95M01-125

Instructions

Doc ID 023153 Rev 1

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When the highest address is reached, the address counter rolls over to zero, allowing the

Read cycle to be continued indefinitely. The whole memory can, therefore, be read with a

single READ instruction.

The Read cycle is terminated by driving Chip Select (S) high. The rising edge of the Chip

Select (S) signal can occur at any time during the cycle.

The instruction is not accepted, and is not executed, if a Write cycle is currently in progress.

6.6

Write to Memory Array (WRITE)

As shown in Figure 12, to send this instruction to the device, Chip Select (S) is first driven

low. The bits of the instruction byte, address byte, and at least one data byte are then shifted

in, on Serial Data Input (D).

The instruction is terminated by driving Chip Select (S) high at a byte boundary of the input

data. The self-timed Write cycle, triggered by the Chip Select (S) rising edge, continues for a

period tW (as specified in AC characteristics in Section 9: DC and AC parameters), at the

end of which the Write in Progress (WIP) bit is reset to 0.

In the case of Figure 12, Chip Select (S) is driven high after the eighth bit of the data byte

has been latched in, indicating that the instruction is being used to write a single byte.

However, if Chip Select (S) continues to be driven low, as shown in Figure 13, the next byte

of input data is shifted in, so that more than a single byte, starting from the given address

towards the end of the same page, can be written in a single internal Write cycle.

Each time a new data byte is shifted in, the least significant bits of the internal address

counter are incremented. If more bytes are sent than will fit up to the end of the page, a

condition known as “roll-over” occurs. In case of roll-over, the bytes exceeding the page size

are overwritten from location 0 of the same page.

Figure 12.

Byte Write (WRITE) sequence

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