| 전자부품 데이터시트 검색엔진 |
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TUSB8041IPAPRQ1 데이터시트(PDF) 33 Page - Texas Instruments |
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TUSB8041IPAPRQ1 데이터시트(HTML) 33 Page - Texas Instruments |
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33 / 48 page ![]() VDD11 VDD33 BOARD_3P3V BOARD_1P1V C32 0.1uF C33 10uF C29 0.1uF C30 0.1uF C38 10uF C26 0.1uF C34 0.1uF C27 0.1uF C36 0.1uF C35 0.1uF C28 0.1uF C37 0.1uF TUSB8041-Q1 U1G NC 28 NC 40 VDD33 2 VDD33 20 VDD33 31 VDD33 48 FB5 220 @ 100MHZ C31 0.1uF FB6 220 @ 100MHZ C39 1uF C41 18pF TUSB8041-Q1 U1F GRSTN 50 XO 61 XI 62 SDA/SMBDAT 37 SCL/SMBCLK 38 SMBUSZ/SS_SUSPEND 39 PWRCTL_POL 41 AUTOENZ/HS_SUSPEND 45 TEST 49 USB_R1 64 C40 18pF Y1 24MHz R18 4.7K 0402 5% R14 1M R15 9.53K 0402 1% R16 4.7K TUSB8041-Q1 www.ti.com SLLSEE6B – JULY 2014 – REVISED JANUARY 2016 9.2.1.2.7 Clock, Reset, and Misc The PWRCTL_POL is left unconnected which results in active high power enable (PWRCTL1, PWRCTL2, PWRCTL3, and PWRCTL4) for a USB VBUS power switch. The 1 µF capacitor on the GRSTN pin can only be used if the VDD11 supply is stable before the VDD33 supply. The depending on the supply ramp of the two supplies the capacitor may have to be adjusted. Figure 11. Clock, Reset, and Misc 9.2.1.2.8 TUSB8041-Q1 Power Implementation Figure 12. TUSB8041-Q1 Power Implementation Copyright © 2014–2016, Texas Instruments Incorporated Submit Documentation Feedback 33 |
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