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STL4N80K5 데이터시트(PDF) 5 Page - STMicroelectronics

부품명 STL4N80K5
상세설명  Ultra low gate charge
PDF  17 Pages
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DocID025574 Rev 2
5/17
STL4N80K5
Electrical characteristics
17
The built-in back-to-back Zener diodes have been specifically designed to enhance the ESD
capability of the device. The Zener voltage is appropriate for efficient and cost-effective
intervention to protect the device integrity. These integrated Zener diodes thus eliminate the
need for external components.
Table 6. Switching times
Symbol
Parameter
Test conditions
Min.
Typ.
Max
Unit
td(on)
Turn-on delay time
VDD = 400 V, ID = 1.5 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 15),
(see Figure 20)
-16.5
-
ns
tr
Rise time
-
15
-
ns
td(off)
Turn-off delay time
-
36
-
ns
tf
Fall time
-
21
-
ns
Table 7. Source drain diode
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
ISD
Source-drain current
-
2.5
A
ISDM
Source-drain current (pulsed)
-
10
A
VSD
(1)
1. Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Forward on voltage
ISD = 3 A, VGS = 0
-
1.5
V
trr
Reverse recovery time
ISD = 3 A, di/dt = 100 A/µs
VDD = 60 V (see Figure 17)
-242
ns
Qrr
Reverse recovery charge
-
1.42
µC
IRRM
Reverse recovery current
-
12
A
trr
Reverse recovery time
ISD = 3 A, di/dt = 100 A/µs
VDD = 60 V, Tj = 150 °C
(see Figure 17)
-373
ns
Qrr
Reverse recovery charge
-
1.98
µC
IRRM
Reverse recovery current
-
10.5
A
Table 8. Gate-source Zener diode
Symbol
Parameter
Test conditions
Min
Typ.
Max
Unit
V(BR)GSO Gate-source breakdown voltage IGS= ± 1mA, ID=0
30
-
-
V



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