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ACT4524 데이터시트(PDF) 8 Page - Active-Semi, Inc |
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ACT4524 데이터시트(HTML) 8 Page - Active-Semi, Inc |
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8 / 16 page ![]() ACT4524 Rev 0, 28-Jul-15 Innovative Power TM - 8 - www.active-semi.com Copyright © 2015 Active-Semi, Inc. APPLICATIONS INFORMATION PCB Layout Guidance When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the IC. 1) Arrange the power components properly to reduce the AC loop size which consisting of CIN, VIN pin, SW pin and the Schottky diode. 2) Place input decoupling ceramic capacitor CIN as close to VIN pin as possible. CIN is connected to power GND with either vias or short and wide path. 3) Return CSP to signal GND pin, and connect the signal GND to power GND at a single point for best noise immunity. Connect exposed pad to power ground copper area other ground planes by thermal vias. 4) Use copper plane for power GND for best heat dissipation and noise immunity. 5) Use short trace connecting HSB-CHSB-SW loop. 6) SW pad is noise node which is switching from VIN to GND. It should be isolated away from the rest of circuit for good EMI and low noise operation. |
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