PEB2055 datasheet(51/269 Pages) INFINEON

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PEB 2055

PEF 2055

Detailed Register Description

Semiconductor Group

4.2.1.4 PCM-Offset Upstream Register (POFU)

Access in demultiplexed

µP-interface mode:

read/write

address: 3H

OMDR:RBS = 1

Access in multiplexed

µP-interface mode:

read/write

address: 26H

Reset value: 00H

OFU9..2

Offset Upstream bit 9…2.

These bits together with PCSR:OFU1..0 determine the offset of the PCM

frame in upstream direction. The following formulas apply for calculating the

required register value. BNU is the bit number in upstream direction marked

by the rising internal PFS-edge.

PCM mode 0:

OFU9..2 = mod

BPF (BNU + 23)

PCSR:OFU1..0 = 00

PCM mode 1:

OFU9..1 = mod

BPF (BNU + 47)

PCSR:OFU0 = 0

PCM mode 2:

OFU9..0 = mod

BPF (BNU + 95)

4.2.1.5 PCM-Clock Shift Register (PCSR)

Access in demultiplexed

µP-interface mode:

read/write

address: 4H

OMDR:RBS = 1

Access in multiplexed

µP-interface mode:

read/write

address: 28H

Reset value: 00H

OFD1..0

Offset Downstream bits 1…0, see POFD register.

DRE

Downstream Rising Edge.

0…the PCM-data is sampled with the falling edge of PDC

1…the PCM-data is sampled with the rising edge of PDC

OFU1..0

Offset Upstream bits 1…0, see POFU register.

URE

Upstream Rising Edge.

0…the PCM-data is transmitted with the falling edge of PDC

1…the PCM-data is transmitted with the rising edge of PDC

bit 7

bit 0

OFU9

OFU8

OFU7

OFU6

OFU5

OFU4

OFU3

OFU2

bit 7

bit 0

OFD1

OFD0

DRE

OFU1

OFU0

URE

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