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RF430CL330HCPWR 데이터시트(PDF) 12 Page - Texas Instruments |
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RF430CL330HCPWR 데이터시트(HTML) 12 Page - Texas Instruments |
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12 / 47 page ![]() I C or SPI Interface 2 Processing Unit (MSP430- based) ISO14443B RF Interface NDEF Memory (SRAM) SCL/SO SDA/SI SCK E0 E1 E2 INTO ANT1 VCC VSS VCORE ANT2 SCMS/CS RST RF430CL330H SLAS916C – NOVEMBER 2012 – REVISED NOVEMBER 2014 www.ti.com 5 Detailed Description 5.1 Functional Block Diagram Figure 5-1 shows the functional block diagram. Figure 5-1. Functional Block Diagram 5.2 Serial Communication Interface A "dual-mode" serial communication interface supports either SPI or I2C communication. The serial interface allows writing and reading the internal NDEF memory as well as configuring the device operation. 5.3 SPI or I 2C Mode Selection The selection between I2C or SPI mode takes place during the power-up and initialization phase of the device based on the input level at pin SCMS/CS (see Table 5-1). Table 5-1. SPI or I2C Mode Selection Input Level at SCMS/CS During Selected Serial Interface Initialization 0 I2C 1 SPI During initialization, an integrated pullup resistor pulls SCMS/CS high, which makes SPI the default interface. To enable I2C, this pin must be tied low externally. The pullup resistor is disabled after initialization to avoid any current through the resistor during normal operation. In SPI mode, the pin reverts to its CS functionality after initialization. 12 Detailed Description Copyright © 2012–2014, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: RF430CL330H |
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