TLF6001

February 1988

CD4541BMCD4541BC Programmable Timer

General Description

The CD4541B Programmable Timer is designed with a

16-stage binary counter an integrated oscillator for use with

an external capacitor and two resistors output control logic

and a special power-on reset circuit The special features of

the power-on reset circuit are first no additional static pow-

er consumption and second the part functions across the

full voltage range (3V – 15V) whether power-on reset is en-

abled or disabled

Timing and the counter are initialized by turning on power if

the power-on reset is enabled When the power is already

on an external reset pulse will also initialize the timing and

counter After either reset is accomplished the oscillator

frequency is determined by the external RC network The

16-stage counter divides the oscillator frequency by any of 4

digitally controlled division ratios

Features

Y

Y

Increments on positive edge clock transitions

Y

processing

k

10 kHz)

Y

Oscillator frequency range

DC to 100 kHz

Y

Oscillator may be bypassed if external clock is available

(apply external clock to pin 3)

Y

Automatic reset initializes all counters when power

turns on

Y

External master reset totally independent of automatic

reset operation

Y

timer

Y

QQ select provides output logic level flexibility

Y

Reset (auto or master) disables oscillator during reset-

ting to provide no active power dissipation

Y

Clock conditioning circuit permits operation with very

slow clock rise and fall times

Y

Wide supply voltage range30V to 15V

Y

Y

5V – 10V – 15V parameter ratings

Y

Symmetrical output characteristics

Y

Maximum input leakage 1 mA at 15V over full tempera-

ture range

Y

High output drive (pin 8) min one TTL load

Logic Diagram

TLF6001 – 1

Connection Diagram

Dual-In-Line Package

Order Number CD4541B

NCNot connected

TLF6001 – 2

Top View

C1995 National Semiconductor Corporation

RRD-B30M105Printed in U S A