AD6649

Data Sheet

Rev. C | Page 2 of 40

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

General Description......................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 2

Product Highlights ........................................................................... 3

Specifications..................................................................................... 4

ADC DC Specifications............................................................... 4

ADC AC Specifications ............................................................... 5

Digital Specifications ................................................................... 6

Switching Specifications .............................................................. 8

Timing Specifications .................................................................. 9

Absolute Maximum Ratings.......................................................... 10

Thermal Characteristics ............................................................ 10

ESD Caution................................................................................ 10

Pin Configuration and Function Descriptions........................... 11

Typical Performance Characteristics ........................................... 13

Equivalent Circuits......................................................................... 16

Theory of Operation ...................................................................... 17

ADC Architecture ...................................................................... 17

Analog Input Considerations.................................................... 17

Voltage Reference ....................................................................... 19

Clock Input Considerations...................................................... 19

Power Dissipation and Standby Mode..................................... 20

Digital Outputs ........................................................................... 21

Overrange (OR).......................................................................... 21

Digital Processing........................................................................... 22

Numerically Controlled Oscillator (NCO) ............................. 22

NCO and FIR Filter Modes....................................................... 22

fS/4 Fixed-Frequency NCO ....................................................... 22

Numerically Controlled Oscillator (NCO) ................................. 23

Frequency Translation ............................................................... 23

NCO Synchronization ............................................................... 23

NCO Amplitude and Phase Dither.......................................... 23

FIR Filters ........................................................................................ 24

FIR Synchronization .................................................................. 24

Filter Performance...................................................................... 24

Output NCO ............................................................................... 25

ADC Overrange and Gain Control.............................................. 26

ADC Overrange (OR)................................................................ 26

Gain Switching............................................................................ 26

DC Correction ................................................................................ 27

Channel/Chip Synchronization.................................................... 28

Serial Port Interface (SPI).............................................................. 29

Configuration Using the SPI..................................................... 29

Hardware Interface..................................................................... 29

SPI Accessible Features.............................................................. 30

Memory Map .................................................................................. 31

Reading the Memory Map Register Table............................... 31

Memory Map Register Table..................................................... 32

Memory Map Register Description ......................................... 36

Applications Information .............................................................. 39

Design Guidelines ...................................................................... 39

Outline Dimensions....................................................................... 40

Ordering Guide .......................................................................... 40

REVISION HISTORY

1/14—Rev. B to Rev. C

Changes to FIR Filters Section.......................................................24

Added Table 12; Renumbered Sequentially .................................24

Changes to Figure 43 and Figure 44..............................................25

1/13—Rev. A to Rev. B

Change to Features Section ..............................................................1

Change to Input Referred Noise Parameter, Table 1.....................4

Changes to Table 2.............................................................................5

Change to Logic Input/Output (SDIO) Parameter, Table 3.........6

Changes to Table 4.............................................................................8

Change to Reading the Register Memory Map Table Section .......31

Changes to Table 15.........................................................................33

Change to Memory Map Register Description Section .............36

Updated Outline Dimensions........................................................40

9/11—Rev. 0 to Rev. A

Changes to Table 1.............................................................................4

Changes to Table 3.............................................................................6

Changes to Table 4.............................................................................8

Changes to Table 8.......................................................................... 11

Added Overrange (OR) Section ................................................... 21

Changes to Channel/Chip Synchronization Section ................. 28

Change to the NCO/FIR SYNC Pin Control (Register 0x59) .. 38

4/11—Revision 0: Initial Version