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ADG5404F 데이터시트(PDF) 13 Page - Analog Devices |
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ADG5404F 데이터시트(HTML) 13 Page - Analog Devices |
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13 / 30 page ![]() Data Sheet ADG5404F Rev. B | Page 13 of 30 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS Figure 2. TSSOP Pin Configuration Figure 3. LFCSP Pin Configuration Table 7. Pin Function Descriptions Pin No. Mnemonic Description TSSOP LFCSP 1 15 A0/F01 Logic Control Input (A0). Decoder for the SF Pin (F0). 2 16 EN Active High Digital Input. When this pin is low, the device is disabled and all switches are off. When this pin is high, the Ax logic control inputs determine the on switches. 3 1 VSS Most Negative Power Supply Potential. 4 3 S1 Overvoltage Protected Source Terminal 1. This pin can be an input or an output. 5 4 S2 Overvoltage Protected Source Terminal 2. This pin can be an input or an output. 6 6 D Drain Terminal. This pin can be an input or an output. 7 5 DR Drain Response Digital Input. Tying this pin to GND enables the drain to pull to VDD or VSS during an overvoltage fault condition. The default condition of the drain is open circuit when the pin is left floating or if it is tied to VDD. 8 7 SF Specific Fault Digital Output. This pin has a high output when the device is in normal operation and a low output when a fault condition is detected on a specific pin, depending on the state of A0/F0 and A1/F1 (see Table 9). 9 8 FF Fault Flag Digital Output. This pin has a high output when the device is in normal operation and a low output when a fault condition occurs on any of the Sx inputs. 10 9 S4 Overvoltage Protected Source Terminal 4. This pin can be an input or an output. 11 10 S3 Overvoltage Protected Source Terminal 3. This pin can be an input or an output. 12 11 VDD Most Positive Power Supply Potential. 13 12 GND Ground (0 V) Reference. 14 14 A1/F11 Logic Control Input (A1). Decoder for the SF Pin (F1). 2, 13 NIC Not internally connected N/A2 17 EP The exposed pad is connected internally. For increased reliability of the solder joints and maximum thermal capability, it is recommended that the pad be soldered to the substrate, VSS. 1 Throughout the data sheet, dual function pin names are referenced by the relevant function where applicable. 2 N/A means not applicable. 1 2 3 4 5 6 7 EN VSS S1 DR D S2 A0/F0 14 13 12 11 10 9 8 GND VDD S3 SF FF S4 A1/F1 ADG5404F TOP VIEW (Not to Scale) 12 11 10 1 3 4 9 2 NOTES 1. NIC = NOT INTERNALLY CONNECTED. 2. THE EXPOSED PAD IS CONNECTED INTERNALLY. FOR INCREASED RELIABILITY OF THE SOLDER JOINTS AND MAXIMUM THERMAL CAPABILITY, IT IS RECOMMENDED THAT THE PAD BE SOLDERED TO THE SUBSTRATE, VSS. VSS NIC S1 S2 GND VDD S3 S4 ADG5404F TOP VIEW (Not to Scale) |
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