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LP38513

www.ti.com

SNVS361E – JULY 2007 – REVISED NOVEMBER 2015

9 Power Supply Recommendations

The LP38513 device is designed to operate from an input supply voltage range of 2.25 V to 5.5 V. The input

supply should be well-regulated and free of spurious noise. A minimum capacitor value of 10

μF is required.

10 Layout

10.1 Layout Guidelines

The dynamic performance of the LP38513 is dependent on the layout of the PCB. PCB layout practices that are

adequate for typical LDOs may degrade the PSRR, noise, or transient performance of the device. Best

using as wide and short of a copper trace as is practical.

Good PC layout practices must be used or instability can be induced because of ground loops and voltage drops.

The input and output capacitors must be directly connected to the IN, OUT, and GND pins of the LP38513 using

connected to the external circuit ground so that the regulator and its capacitors have a single-point ground.

Stability problems have been seen in applications where vias to an internal ground plane were used at the

ground points of the LP38513 device and the input and output capacitors. This was caused by varying ground

potentials at these nodes resulting from current flowing through the ground plane. Using a single point ground

technique for the regulator and its capacitors fixed the problem.

Because high current flows through the traces going into the IN pin and coming from the OUT pin, Kelvin connect

the capacitor leads to these pins so there is no voltage drop in series with the input and output capacitors.

10.2 Layout Example

Figure 24. LP38513 Layout

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Product Folder Links: LP38513