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PI6C490094

Rev A

08/09/13

PI6C490094

1:4 24MHz Clock Buffer

Symbol

Parameter

Conditions

Min.

Typ.

Max.

Units

Input Frequency

Fundamental Crystal

24

MHz

Input Clock

24

MHz

Output Rise Time

20% to 80% 24MHz, Note 1

1

ns

Output Fall Time

80% to 20% 24MHz, Note 1

1

ns

Duty Cycle

47

53

%

Clock Phase Jitter (RMS)

24MHz, Note 2

1.5

ps

Additive Jitter

24MHz, Note 3

300

fs

1. Note 1: Measured with 7 pF lump load.

2. Note 2: 12 kHz to 20 MHz offset frequency using a crystal input.

3. Note 3: CLKIN input with X2 floating.

4. Note 4: Do not drive this device without a crystal or valid clock input

VDD

CLOAD

VDD

GND GND

CLK out

OUTPUTS

0.1µF

0.1µF

CMOS Test Configuration

13-0129