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MB91F528 데이터시트(PDF) 202 Page - SPANSION |
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MB91F528 데이터시트(HTML) 202 Page - SPANSION |
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202 / 241 page ![]() D a t a S h e e t March 28, 2014, MB91F528_DS705-00016-1v0-E 199 CONFIDENTIAL Parameter Sym bol Pin name Con ditio ns Value Unit Remarks Min Max SCS↑ →SOT delay time tDSE SCS1, SCS2, SCS50 to SCS53, SCS60 to SCS63, SCS70 to SCS73, SCS8 to SCS15, SCK18, SCK19 SOT1, SOT2, SOT5 to SOT15, SOT18, SOT19 - - 40 ns External shift clock mode output pin: CL=50pF SCS3, SCS40 to SCS43 SOT3, SOT4 - 300 ns SCS↓ →SOT delay time tDEE SCS1 to SCS3, SCS40 to SCS43, SCS50 to SCS53, SCS60 to SCS63, SCS70 to SCS73, SCS8 to SCS15 SCK18, SCK19 SOT1 to SOT15, SOT18, SOT19 +0 - ns SCK↓ →SCS↑ clock switch time tSCC SCK1, SCK2, SCK5 to SCK15, SCK18, SCK19 SCS1,SCS2, SCS50 to SCS53, SCS60 to SCS63, SCS70 to SCS73, SCS8 to SCS15, SCS18, SCS19 - 3tCPP-10 3tCPP+50 ns Internal shift clock mode Round operation output pin: CL=50pF SCK3, SCK4 SCS3, SCS40 to SCS43 3tCPP-300 3tCPP+50 ns *1: tCSSU =SCSTR:CSSU7-0 × Serial chip select timing operating clock *2: tCSHD=SCSTR:CSHD7-0 × Serial chip select timing operating clock *3: tCSDS=SCSTR:CSDS15-0 × Serial chip select timing operating clock Regardless of the deselect time setting, once after the serial chip select pin becomes inactive, it will take at least five peripheral bus clock cycles to be active again. Please see the hardware manual for details of above-mentioned *1,*2, and *3. |
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