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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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MB91F528 데이터시트(PDF) 213 Page - SPANSION |
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MB91F528 데이터시트(HTML) 213 Page - SPANSION |
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213 / 241 page  D a t a S h e et 210 MB91F528_DS705-00016-1v0-E, March 28, 2014 CONFIDENTIAL (10) External bus I/F (synchronous mode) timing (TA: -40°C to +105°C, VCC=AVCC=5.0V±10%/VCC= AVCC=3.3V±0.3V, VSS=AVSS=0.0V) (external load capacitance 50pF) Parameter Symbol Pin name Value Unit Remarks Min Max Cycle time tCYC SYSCLK 25 - ns VCC=5.0V±10% *1 31.25 VCC=3.3V±0.3V ASX delay time tCHASL, tCHASH SYSCLK, ASX 0.5 18 ns CS0X to CS3X delay time tCHCSL, tCHCSH SYSCLK, CS0X to CS3X 0.5 18 ns A00 to A21 delay time tCHAV, tCHAX SYSCLK, A00 to A21 0.5 18 ns RDX delay time tCHRL, tCHRH SYSCLK, RDX 0.5 18 ns RDX minimum pulse tRLRH RDX tCYC× 2 - 20 - ns RWT=1, set RWT to 1 or more. *2 Data setup → RDX↑time tDSRH RDX, D16 to D31 18+tCYC - ns Same as above RDX↑→ data hold tRHDH 0 - ns WRnX delay time tCHWL, tCHWH SYSCLK, WR0X, WR1X 0.5 18 ns WRnX minimum pulse tWLWH WR0X, WR1X tCYC - 10 - ns WWT=0 *2 SYSCLK↑→ data output time tCHDV SYSCLK, D16 to D31 0.5 18 ns SYSCLK↑→ data hold time tCHDX - 18 ns Set WRCS to 1 or more. |
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