ADC12H032CIWM datasheet(35/41 Pages) NSC

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Application Hints (Continued)

10.0 GROUNDING

The ADC12030/2/4/8’s performance can be maximized

through proper grounding techniques. These include the use

of separate analog and digital ground planes. The digital

ground plane is placed under all components that handle

digital signals, while the analog ground plane is placed under

all components that handle analog signals. The digital and

analog ground planes are connected together at only one

point, either the power supply ground or at the pins of the

ADC. This greatly reduces the occurence of ground loops

and noise.

Shown in Figure 18 is the ideal ground plane layout for the

ADC12038 along with ideal placement of the bypass capaci-

tors. The circuit board layout shown in Figure 18 uses three

bypass capacitors: 0.01 µF (C1) and 0.1 µF (C2) surface

mount capacitors and 10 µF (C3) tantalum capacitor.

11.0 CLOCK SIGNAL LINE ISOLATION

The ADC12030/2/4/8’s performance is optimized by routing

the analog input/output and reference signal conductors as

far as possible from the conductors that carry the clock

signals to the CCLK and SCLK pins. Ground traces parallel

to the clock signal traces can be used on printed circuit

boards to reduce clock signal interference on the analog

input/output pins.

12.0 THE CALIBRATION CYCLE

A calibration cycle needs to be started after the power sup-

plies, reference, and clock have been given enough time to

stabilize after initial turn-on. During the calibration cycle,

correction values are determined for the offset voltage of the

sampled data comparator and any linearity and gain errors.

These values are stored in internal RAM and used during an

analog-to-digital conversion to bring the overall full-scale,

offset, and linearity errors down to the specified limits.

Full-scale error typically changes ±0.4 LSB over tempera-

ture and linearity error changes even less; therefore it should

be necessary to go through the calibration cycle only once

after power up if the Power Supply Voltage and the ambient

temperature do not change significantly (see the curves in

the Typical Performance Characteristics).

13.0 THE AUTO-ZERO CYCLE

To correct for any change in the zero (offset) error of the A/D,

the auto-zero cycle can be used. It may be necessary to do

an auto-zero cycle whenever the ambient temperature or the

power supply voltage change significantly. (See the curves

titled “Zero Error Change vs Ambient Temperature” and

“Zero Error Change vs Supply Voltage” in the Typical Perfor-

mance Characteristics.)

14.0 DYNAMIC PERFORMANCE

Many applications require the A/D converter to digitize AC

signals, but the standard DC integral and differential nonlin-

earity specifications will not accurately predict the A/D con-

verter’s performance with AC input signals. The important

specifications for AC applications reflect the converter’s abil-

ity to digitize AC signals without significant spectral errors

and without adding noise to the digitized signal. Dynamic

characteristics such as signal-to-noise (S/N), signal-tonoise

+ distortion ratio (S/(N + D)), effective bits, full power band-

width, aperture time and aperture jitter are quantitative mea-

sures of the A/D converter’s capability.

An A/D converter’s AC performance can be measured using

Fast Fourier Transform (FFT) methods. A sinusoidal wave-

form is applied to the A/D converter’s input, and the trans-

form is then performed on the digitized waveform. S/(N + D)

and S/N are calculated from the resulting FFT data, and a

spectral plot may also be obtained. Typical values for S/N

01135443

FIGURE 18. Ideal Ground Plane

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