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AD9613 데이터시트(PDF) 14 Page - Analog Devices

부품명 AD9613
상세설명  12-Bit, 170 MSPS/210 MSPS/250 MSPS, 1.8 V Dual Analog-to-Digital Converter (ADC)
PDF  36 Pages
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
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AD9613 데이터시트(HTML) 14 Page - Analog Devices

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AD9613
Data Sheet
Rev. C | Page 14 of 36
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
CLK+
CLK–
SYNC
DNC
DNC
ORB–
ORB+
DNC
DNC
DRVDD
B D0–/D1– (LSB)
B D0+/D1+ (LSB)
B D2–/D3–
B D2+/D3+
B D4–/D5–
B D4+/D5+
NOTES
1. DNC = DO NOT CONNECT. DO NOT CONNECT TO THIS PIN.
2. THE EXPOSED THERMAL PADDLE ON THE BOTTOM OF THE PACKAGE PROVIDES THE
ANALOG GROUND FOR THE PART. THIS EXPOSED PADDLE MUST BE CONNECTED TO
GROUND FOR PROPER OPERATION.
PDWN
OEB
CSB
SCLK
SDIO
ORA+
ORA–
A D10+/D11+ (MSB)
A D10–/D11– (MSB)
A D8+/D9+
A D8–/D9–
DRVDD
A D6+/D7+
A D6–/D7–
A D4+/D5+
A D4–/D5–
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
AD9613
CHANNEL
MULTIPLEXED
(EVEN/ODD)
LVDS
TOP VIEW
(Not to Scale)
PIN 1
INDICATOR
Figure 5. Pin Configuration (Top View) for the LFCSP Channel Multiplexed (Even/Odd) LVDS Mode
Table 9. Pin Function Descriptions for the LFCSP Channel Multiplexed (Even/Odd) LVDS Mode
Pin No.
Mnemonic
Type
Description
ADC Power Supplies
10, 19, 28, 37
DRVDD
Supply
Digital Output Driver Supply (1.8 V Nominal).
49, 50, 53, 54, 59, 60, 63, 64
AVDD
Supply
Analog Power Supply (1.8 V Nominal).
4 to 9, 26, 27, 55, 56, 58
DNC
Do Not Connect. Do not connect to these pins.
0
AGND, Exposed
Paddle
Ground
The exposed thermal paddle on the bottom of the package provides
the analog ground for the part. This exposed paddle must be connected
to ground for proper operation.
ADC Analog
51
VIN+A
Input
Differential Analog Input Pin (+) for Channel A.
52
VIN−A
Input
Differential Analog Input Pin (−) for Channel A.
62
VIN+B
Input
Differential Analog Input Pin (+) for Channel B.
61
VIN−B
Input
Differential Analog Input Pin (−) for Channel B.
57
VCM
Output
Common-Mode Level Bias Output for Analog Inputs. This pin should be
decoupled to ground using a 0.1 μF capacitor.
1
CLK+
Input
ADC Clock Input—True.
2
CLK−
Input
ADC Clock Input—Complement.
Digital Input
3
SYNC
Input
Digital Synchronization Pin. Slave mode only.
Digital Outputs
7
ORB+
Output
Channel B LVDS Overrange Output—True. The overrange indication is
valid on the rising edge of the DCO.
6
ORB−
Output
Channel B LVDS Overrange Output—Complement. The overrange
indication is valid on the rising edge of the DCO.



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