TLF10907

September 1995

CGS74B2525

1-to-8 Minimum Skew Clock Driver

General Description

This minimum skew clock driver is designed for Clock Gen-

eration and Support (CGS) applications operating well

above 20 MHz (33 MHz 50 MHz) The device guarantees

minimum output skew across the outputs of a given device

and also from device-to-device Skew parameters are also

provided as a means to measure duty cycle requirements as

those found in high speed clocking systems The ’B2525 is

a minimum skew clock driver with one input driving eight

outputs specifically designed for signal generation and clock

distribution applications

Features

Y

Clock Generation and Support (CGS) DeviceIdeal for

high frequency signal generation or clock distribution

applications

Y

CGS74B version features National’s Advanced Bipolar

FAST

LSI process

Y

1-to-8 low skew clock distribution

Y

600 ps pin-to-pin output skew

Y

Specifications for device-to-device variation of propaga-

tion delay

Y

Specification for transition skew to meet duty cycle

requirements

Y

speed switching noise

Y

Current sourcing 48 mA and current sinking of 64 mA

Y

Low dynamic power consumption above 20 MHz

Y

Guaranteed 4 kV ESD protection

Logic Symbol

TLF10907 – 1

Connection Diagram

Pin Assignment

for DIP and SOIC

TLF10907 – 2

FAST

and TRI-STATE

are registered trademarks of National Semiconductor Corporation

C1995 National Semiconductor Corporation

RRD-B30M115Printed in U S A