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CGS74C2525 데이터시트(PDF) 6 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
부품명 CGS74C2525
상세설명  1-to-8 Minimum Skew Clock Driver
PDF  10 Pages
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제조업체  NSC [National Semiconductor (TI)]
홈페이지  http://www.national.com
Logo NSC - National Semiconductor (TI)

CGS74C2525 데이터시트(HTML) 6 Page - National Semiconductor (TI)

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AC Electrical Characteristics
Over recommended operating conditions unless specified otherwise (Continued)
(Note 6)
Range
VCC
(V)
CGS74CT
54ACT
CGS74CT
TA ea25 C
TA eb55 CTA eb40 C
Symbol
Parameter
CL e 50 pF
to a125 Cto a85 C
Units
CL e 50 pF
CL e 50 pF
Min
Typ
Max
Min
Max
Min
Typ
Max
tPLH
Propagation Delay
50
51
85
124
44
141
ns
tPHL
SEL to On (’2526)
tOSHL
Maximum Skew
Common Edge
50
02
550
ps
Output-to-Output (Note 7)
Variation
tOSLH
Maximum Skew
Common Edge
50
02
550
ps
Output-to-Output (Note 7)
Variation
tOST
Maximum Skew
Opposite Edge
50
04
10
ns
Output-to-Output (Note 7)
Variation
tPV
Maximum Skew
AC2525
Part-to-Part
ACT2525
Variation (Note 8)
AC2526
50
35
ns
ACT2526
50
50
ns
trise
Maximum
tfall
RiseFall Time
50
30
375
ns
(20% to 80% VCC)
trise
Maximum
tfall
RiseFall Time
09
11
ns
(08V20V and 20V08V)
Note 2
All outputs loaded thresholds on input associated with output under test
Note 3
IIN and ICC
30V are guaranteed to be less than or equal to the respective limit
55V VCC
ICC for 54AC
25 C is identical to CGS74C
25 C
Note 4
Maximum test duration 20 ms one output loaded at a time
Note 5
ICC for 54ACT
25 C is identical to CGS74CT
25 C
Note 6
Voltage Range 50 is 50V g05V voltage range 33 is 33V g03V
Note 7
Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the same packaged
device The specifications apply to any outputs switching in the same direction either HIGH to LOW (tOSHL) or LOW to HIGH (tOSLH) or in opposite directions both
HL and LH (tOST) tOSHL and tOSLH are characterized and guaranteed by design
1 MHz
Note 8
Part-to-part skew is defined as the absolute value of the difference between the propagation delay for any outputs from device to device The parameter is
specified for a given set of conditions (ie capacitive load VCC temperature
of outputs switching etc) Parameter guaranteed by design
Note 9
Load capacitance includes the test jig
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