Operation

INPUT INTERFACING

The CLC006 has high impedance, emitter-follower buffered,

differential inputs. Single-ended signals may also be input.

Transmission lines supplying input signals must be properly

terminated close to the CLC006. Either A.C. or D.C. coupling

as in

Figure 2 or Figure 3 may be used. Figures 2, 4 and Fig-

ure 5 show how Thevenin-equivalent resistor networks are

used to provide input termination and biasing. The input D.C.

common-mode voltage range is 0.8V to 2.5V below the posi-

tive power supply (V

kept within the specified common-mode range. For an 800

mV

to 2.1V below the positive supply.

Load Type

Resistor to V

Resistor to V

ECL, 50

Ω, 5V, V

82.5

Ω

124

Ω

ECL, 50

Ω, 5.2V, V

80.6

Ω

133

Ω

ECL, 75

Ω, 5V, V

124

Ω

187

Ω

ECL, 75

Ω, 5.2V, V

121

Ω

196

Ω

800mV

75.0

Ω

154

Ω

800mV

110

Ω

232

Ω

800mV

3240

Ω

6810

Ω

DS100084-4

FIGURE 1. Input Stage

DS100084-5

FIGURE 2. AC Coupled Input

3

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