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CLC007 데이터시트(PDF) 4 Page - National Semiconductor (TI) |
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CLC007 데이터시트(HTML) 4 Page - National Semiconductor (TI) |
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4 / 10 page ![]() Operation (Continued) OUTPUT INTERFACING The CLC007’s class AB output stage, Figure 6, requires no standing current in the output transistors and therefore re- quires no biasing or pull-down resistors. Advantages of this arrangement are lower power dissipation and fewer external components. The output may be either D.C. or A.C. coupled to the load. A bandgap voltage reference sets output voltage levels which are compatible with F100K and 10K ECL when correctly terminated. The outputs do not have the same out- put voltage temperature coefficient as 10K. Therefore, noise margins will be reduced over the full temperature range DS100085-6 FIGURE 3. DC Coupled Input DS100085-7 FIGURE 4. Single Ended 50 Ω ECL Input DS100085-8 FIGURE 5. Differential 50 Ω ECL Input www.national.com 4 |
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