RT9451

18

DS9451-00

September 2013

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Charger CONFIG Register A (CONFIG_A)

Address - 0x01h

Data Bit

D7

D6

D5

D4

D3

D2

D1

D0

Field Name

LMTSEL

VICHRG [3:0]

VITERM [2:0]

Read/Write

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

Reset Value

0

0

0

0

0

0

0

1

Field Name

Bit Definition

(1)

LMTSEL

Input current limit selection

0 – Input current limit is set to the higher of AICR [1:0] (CONFIG_B) and D+D

− det.

result

1 – AICR [1:0] (CONFIG_B) applied, D+D

− detection result is ignored

VICHRG [3:0]

Charge current sense voltage (current equivalent for 20m

Ω shunt)

0000 – 20mV (1000mA)

0001 – 24mV (1200mA)

0010 – 28mV (1400mA)

0011 – 32mV (1600mA)

0100 – 36mV (1800mA)

0101 – 40mV (2000mA)

0110 – 44mV (2200mA)

0111 – 48mV (2400mA)

1000 – 52mV (2600mA)

1001 – 56mV (2800mA)

1010 – 60mV (3000mA)

1011 – 64mV (3200mA)

1100 – 68mV (3400mA)

1101 – 72mV (3600mA)

1110 – 76mV (3800mA)

1111 – 80mV (4000mA)

VITERM [2:0]

Termination current sense voltage (current equivalent for 20m

Ω shunt)

000 – 1mV (50mA)

001 – 2mV (100mA)

010 – 3mV (150mA)

011 – 4mV (200mA)

100 – 5mV (250mA)

101 – 6mV (300mA)

110 – 7mV (350mA)

111 – 8mV (400mA)

(1) During charging the lower value of VMCHRG [3:0] (CONFIG_D register) and VICHRG [2:0] applies.