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CLC501 데이터시트(PDF) 1 Page - National Semiconductor (TI) |
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CLC501 데이터시트(HTML) 1 Page - National Semiconductor (TI) |
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1 / 6 page ![]() Features s Output clamping (Vhigh and Vlow) s 1ns recovery from clamping/overdrive s 0.05% settling in 12ns s Characterized and guaranteed at Av = +32 s Low power, 180mW Applications s Residue amplifier in high-accuracy, subranging A/D systems s High-speed communications s Output clamping applications s Pulse amplitude modulation systems General Description CLC501 High-Speed Output Clamping Op Amp N June 1999 Pinout DIP & SOIC © 1999 National Semiconductor Corporation http://www.national.com Printed in the U.S.A. The CLC501 is available in several versions to meet a variety of requirements. A three-letter suffix determines the version: CLC501AJP -40°C to +85°C 8-pin plastic DIP CLC501AJE -40°C to +85°C 8-pin plastic SOIC DESC SMD number: 5962-89974 Non-Inverting Frequency Response 1 10 100 -180 -450 -270 -360 -90 0 Vout = 2Vpp Av = 16 Rf = 2.49kΩ Av = 8 Rf = 4.02kΩ Av = 32 Rf = 1.5kΩ Av = 64 Rf = 604Ω |
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