CLC5602IM datasheet(9/12 Pages) NSC

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Figure 9: Power Derating Curves

Layout Considerations

A proper printed circuit layout is essential for achieving

high

frequency

performance.

National

provides

evaluation boards for the CLC5602 (CLC730038-DIP,

CLC730036-SOIC) and suggests their use as a guide for

high frequency layout and as an aid for device testing and

characterization.

General layout and supply bypassing play major roles in

high frequency performance. Follow the steps below as

a basis for high frequency layout:

Include 6.8

µF tantalum and 0.1µF ceramic

capacitors on both supplies.

Place the 6.8

µF capacitors within 0.75 inches

of the power pins.

Place the 0.1

µF capacitors less than 0.1 inches

from the power pins.

Remove the ground plane under and around the

part, especially near the input and output pins to

reduce parasitic capacitance.

Minimize all trace lengths to reduce series

inductances.

Use flush-mount printed circuit board pins for

prototyping, never use high profile DIP sockets.

Evaluation Board Information

A data sheet is available for the CLC730038/ CLC730036

evaluation boards.

The evaluation board data sheet

provides:

Evaluation board schematics

Evaluation board layouts

General information about the boards

The evaluation boards are designed to accommodate

dual supplies. The boards can be modified to provide

single supply operation.

For best performance; 1) do

not connect the unused supply, 2) ground the unused

supply pin.

SPICE Models

SPICE models provide a means to evaluate amplifier

designs. Free SPICE models are available for National’s

monolithic amplifiers that:

Support Berkeley SPICE 2G and its many derivatives

Reproduce typical DC, AC, Transient, and Noise

performance

Support room temperature simulations

The

readme file that accompanies the diskette lists

released models, and provides a list of modeled parame-

ters.

The application note OA-18, Simulation SPICE

Models for National’s Op Amps, contains schematics and

a reproduction of the readme file.

Single Supply Cable Driver

The typical application shown below shows one of the

CLC5602 amplifiers driving 10m of 75

Ω coaxial cable.

The CLC5602 is set for a gain of +2V/V to compensate

for the divide-by-two voltage drop at Vo.

Figure 10: Single Supply Cable Driver

Figure 11: Response After 10m of Cable

Single Supply Lowpass Filter

Figures 12 and 13 illustrate a lowpass filter and design

equations. The circuit operates from a single supply of

+5V. The voltage divider biases the non-inverting input to

2.5V. And the input is AC coupled to prevent the need for

level shifting the input signal at the source.

Use the

design equations to determine R1, R2, C1, and C2 based

on the desired Q and corner frequency.

Application Circuits

1/2

CLC5602

Ω

0.1

µF

6.8

µF

Vin

+5V

Ω

0.1

µF

10m of 75

Ω

Coaxial Cable

Ω

0.1

µF

Ω

0.1

µF

20ns/div

Vin = 10MHz, 0.5Vpp

Ambient Temperature (

°C)

0.2

0.4

0.6

0.8

1.0

-40 -20

80 100 120

180

140 160

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