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NOIP1SN016KA 데이터시트(PDF) 39 Page - ON Semiconductor

부품명 NOIP1SN016KA
상세설명  PYTHON 25K/16K/12K/10K Global Shutter CMOS Image Sensors
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39
Frame Synchronization
Table 24 shows the structure of the frame synchronization
code. Note that the table shows the default data word
(configurable). If more than one window is active at the
same time, the sync channel transmits the frame
synchronization codes of the window with highest index
only.
Table 24. FRAME SYNCHRONIZATION CODE DETAILS
Sync Word Bit
Position
Register
Address
Default Value
Description
9:7
N/A
0x5
Frame start (FS) indication
9:7
N/A
0x6
Frame end (FE) indication
9:7
N/A
0x1
Line start (LS) indication
9:7
N/A
0x2
Line end (LE) indication
6:0
117[6:0]
0x2A
These bits indicate that the received sync word is a frame synchronization code. The value is
programmable by a register setting
Window Identification
Frame synchronization codes are always followed by a
4−bit window identification (bits 3:0). This is an integer
number, ranging from 0 to 15, indicating the active window.
If more than one window is active for the current cycle, the
highest window ID is transmitted.
Data Classification Codes
For the remaining cycles, the sync channel indicates the
type of data sent through the data links: black pixel data
(BL), image data (IMG), or training pattern (TR). These
codes are programmable by a register setting. The default
values are listed in Table 25.
Table 25. SYNCHRONIZATION CHANNEL DEFAULT IDENTIFICATION CODE VALUES
Sync Word Bit
Position
Register
Address
Default Value
Description
9:0
118 [9:0]
0x015
Black pixel data (BL). This data is not part of the image. The black pixel data is used
internally to correct channel offsets.
9:0
119 [9:0]
0x035
Valid pixel data (IMG). The data on the data output channels is valid pixel data (part of the image).
9:0
125 [9:0]
0x059
CRC value. The data on the data output channels is the CRC code of the finished image data line.
9:0
126 [9:0]
0x3A6
Training pattern (TR). The sync channel sends out the training pattern which can be
programmed by a register setting.



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