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TTP259-ASFN 데이터시트(PDF) 45 Page - Tontek Design Technology

부품명 TTP259-ASFN
상세설명  Preliminary
PDF  81 Pages
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제조업체  TONTEK [Tontek Design Technology]
홈페이지  http://www.tontek.com.tw
Logo TONTEK - Tontek Design Technology

TTP259-ASFN 데이터시트(HTML) 45 Page - Tontek Design Technology

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Preliminary
TTP259
TonTouch
TM
2015/05/25
Page 45 of 81
Ver: 1.1
IICRDATL1[228H]: IIC fast read data low nibble register 1 [R/W], default value [0000]
Register
Bit3
Bit2
Bit1
Bit0
Bit Name
RDAT13
RDAT12
RDAT11
RDAT10
Read/Write
R/W
R/W
R/W
R/W
RDAT13~RDAT10: IIC fast read low nibble data 1.
IICRDATH1[229H]: IIC fast read data high nibble register 1 [R/W], default value [0000]
Register
Bit3
Bit2
Bit1
Bit0
Bit Name
RDAT17
RDAT16
RDAT15
RDAT14
Read/Write
R/W
R/W
R/W
R/W
RDAT17~RDAT14: IIC fast read high nibble data 1.
.IIC operation
IIC support normal mode and fast read mode. Normal mode is
compatible to standard IIC bus. Fast read mode is support fast read data, for
reduce CPU wait time.
In normal mode, IIC device address match and completion of one byte of
data transfer, interrupt will occur. It is set at the falling edge of the 9th clock in
normal mode. if master read last data, master does not send acknowledge to
IIC device, it can let IIC device know don’t need to send data, and do dummy
write for release data bus to avoid bus error.
When an interrupt occurs, MCU must first determine the current mode
will be receive or transmit, and then determine whether the command mode
by MAASF flag. Due to the process by software, so before entering the
interrupt will pull low the SCL, to notify the Master waits. In receive mode
when reading IICDATL and the transfer mode when writing IICDATL, the SCL
pull low will be release. The timing as follow:



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