March 1988

13

Philips Semiconductors

HCMOS family characteristics

FAMILY SPECIFICATIONS

AC waveforms 74HCT

Test circuit for 74HCT

handbook, full pagewidth

MGK568

10%

90%

1.3 V

CLOCK

INPUT

3 V

GND

1.3 V

DATA

INPUT

3 V

GND

10%

90%

1.3 V

OUTPUT

tsu

tPHL

tPLH

tsu

tTLH

tTHL

1.3 V

SET,

RESET,

PRESET

INPUT

3 V

GND

tr

tf

tWH

th

th

tWL

trem

1/fmax

Fig.9

Set-up times, hold times, removal times, propagation delays and the maximum clock pulse frequency for

sequential logic ICs.

(1) In Fig.9 the active transition of the clock is going from LOW-to-HIGH and the active level of the forcing signals

(SET, RESET and PRESET) is HIGH. The actual direction of the transition of the clock input and the actual

active levels of the forcing signals are specified in the individual device data sheet.

handbook, halfpage

MGK565

PULSE

GENERATOR

D.U.T

VCC

VI

VO

RT

CL

50 pF

=

load capacitance including jig and probe capacitance (see AC

CHARACTERISTICS for values).

=

the pulse generator.

Fig.10 Test circuit.