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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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IS24C01-2PI 데이터시트(PDF) 12 Page - Integrated Silicon Solution, Inc |
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IS24C01-2PI 데이터시트(HTML) 12 Page - Integrated Silicon Solution, Inc |
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12 / 13 page  12 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 Rev. D 06/25/02 IS24C01 IS24C02 IS24C04 IS24C08 IS24C16 ISSI® AC ELECTRICAL CHARACTERISTICS (Over Operating Range) Automotive (T A = –40°C to +125°C) 2.7V-5.5V 4.5V-5.5V Symbol Parameter Test Conditions Min. Max. Min. Max. Unit fSCL SCL Clock Frequency 0 100 0 400 KHz T Noise Suppression Time(1) — 100 — 50 ns tLOW Clock LOW Period 4.7 — 1.2 — µs tHIGH Clock HIGH Period 4 — 0.6 — µs tBUF Bus Free Time Before New Transmission(1) 4.7 — 1.2 — µs tSU:STA Start Condition Setup Time 4.7 — 0.6 — µs tSU:STO Stop Condition Setup Time 4.7 — 0.6 — µs tHD:STA Start Condition Hold Time 4 — 0.6 — µs tHD:STO Stop Condition Hold Time 4 — 0.6 — µs tSU:DAT Data In Setup Time 200 — 100 — ns tHD:DAT Data In Hold Time 0 — 0 — ns tDH Data Out Hold Time SCL LOW to SDA Data Out Change 100 — 50 — ns tAA Clock to Output SCL LOW to SDA Data Out Valid 0.1 4.5 0.1 0.9 µs tR SCL and SDA Rise Time(1) — 1000 — 300 ns tF SCL and SDA Fall Time(1) — 300 — 300 ns tWR Write Cycle Time — 10 — 10 ms Note: 1. This parameter is characterized but not 100% tested. 2. Automotive data is preliminary. AC ELECTRICAL CHARACTERISTICS (Over Operating Rnage) Commercial (T A = 0°C to +70°C) Industrial (T A = –40°C to +85°C) 1.8V-5.5V 2.5V-5.5V Symbol Parameter Test Conditions Min. Max. Min. Max. Unit fSCL SCL Clock Frequency 0 100 0 400 KHz T Noise Suppression Time(1) — 100 — 50 ns tLOW Clock LOW Period 4.7 — 1.2 — µs tHIGH Clock HIGH Period 4 — 0.6 — µs tBUF Bus Free Time Before New Transmission(1) 4.7 — 1.2 — µs tSU:STA Start Condition Setup Time 4.7 — 0.6 — µs tSU:STO Stop Condition Setup Time 4.7 — 0.6 — µs tHD:STA Start Condition Hold Time 4 — 0.6 — µs tHD:STO Stop Condition Hold Time 4 — 0.6 — µs tSU:DAT Data In Setup Time 200 — 100 — ns tHD:DAT Data In Hold Time 0 — 0 — ns tDH Data Out Hold Time SCL LOW to SDA Data Out Change 100 — 50 — ns tAA Clock to Output SCL LOW to SDA Data Out Valid 0.1 4.5 0.1 0.9 µs tR SCL and SDA Rise Time(1) — 1000 — 300 ns tF SCL and SDA Fall Time(1) — 300 — 300 ns tWR Write Cycle Time — 10 — 5 ms Note: 1. This parameter is characterized but not 100% tested. |
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