CPC7591BATR datasheet(5/17 Pages) IXYS

5 / 17 page

INTEGRATED CIRCUITS DIVISION

CPC7591

R06

www.ixysic.com

1.6 Switch Specifications

1.6.1 Break Switches, SW1 and SW2

Parameter

Test Conditions

Symbol

Minimum

Typical

Maximum

Unit

Off-State

Leakage Current

VSW1 (differential) = TLINE to TBAT

VSW2 (differential) = RLINE to RBAT

All-Off state.

+25

 C,

VSW (differential) = -320 V to gnd

VSW (differential) = +260 V to -60 V

ISW

0.1

A

+85

 C,

VSW (differential) = -330 V to gnd

VSW (differential) = +270 V to -60 V

0.3

-40

 C,

VSW (differential) = -310 V to gnd

VSW (differential) = +250 V to -60 V

0.1

On Resistance

ISW(on) = ±10 mA, ±40 mA,

RBAT and TBAT = -2 V

+25

 C

RON

14.5



+85

 C20.5

-40

 C10.5

On Resistance

Matching

Per SW1 & SW2 On Resistance test

conditions.

R

0.15

0.8



DC current limit

VSW(on) = ±10V

+25

 C

ISW

300

+85

 C

160

-40

 C

400

425

Dynamic current limit

 0.5 s)

Break switches on, all other switches

off. Apply ±1 kV 10x1000

s pulse with

appropriate protection in place.

ISW

-2.5

Logic input to switch

output isolation

Logic Inputs = GND

+25

 C, V

SW (TLINE, RLINE) = ±320 V

ISW

-0.1

A

+85

 C, V

SW (TLINE, RLINE) = ±330 V

-0.3

-40

 C, V

SW (TLINE, RLINE) = ±310 V

-0.1

dV/dt sensitivity

100VPP Square Wave, 100Hz

(Not production tested - limits are

guaranteed by design and quality

control sampling audits.)

500

s

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