SN74LVC2G74 datasheet(4/15 Pages) TI

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Recommended Operating Conditions

(1)

SN74LVC2G74

SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP

WITH CLEAR AND PRESET

SCES203K – APRIL 1999 – REVISED JUNE 2005

MIN

MAX

UNIT

Operating

1.65

5.5

VCC

Supply voltage

Data retention only

1.5

VCC = 1.65 V to 1.95 V

0.65 × VCC

VCC = 2.3 V to 2.7 V

1.7

VIH

High-level input voltage

VCC = 3 V to 3.6 V

VCC = 4.5 V to 5.5 V

0.7 × VCC

VCC = 1.65 V to 1.95 V

0.35 × VCC

VCC = 2.3 V to 2.7 V

0.7

VIL

Low-level input voltage

VCC = 3 V to 3.6 V

0.8

VCC = 4.5 V to 5.5 V

0.3 × VCC

Input voltage

5.5

Output voltage

VCC

VCC = 1.65 V

–4

VCC = 2.3 V

–8

IOH

High-level output current

–16

VCC = 3 V

–24

VCC = 4.5 V

–32

VCC = 1.65 V

VCC = 2.3 V

IOL

Low-level output current

VCC = 3 V

VCC = 4.5 V

VCC = 1.8 V ± 0.15 V, 2.5 V ± 0.2 V

∆t/∆v

Input transition rise or fall rate

VCC = 3.3 V ± 0.3 V

ns/V

VCC = 5 V ± 0.5 V

Operating free-air temperature

–40

°C

(1)

All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

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