CD54ACT32, CD74ACT32

QUADRUPLE 2-INPUT POSITIVE-OR GATES

SCHS342 – MARCH 2003

1

POST OFFICE BOX 655303

Significantly Reduced Power Consumption

– Fanout to 15 F Devices

Circuit Design

MIL-STD-883, Method 3015

description/ordering information

The ’ACT32 devices are quadruple 2-input positive-OR gates. These devices perform the Boolean function

Y

+ A • B or Y + A ) B in positive logic.

ORDERING INFORMATION

TA

PACKAGE†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

PDIP – E

Tube

CD74ACT32E

CD74ACT32E

55

°Cto125°C

SOIC

M

Tube

CD74ACT32M

ACT32M

–55

°C to 125°C

SOIC – M

Tape and reel

CD74ACT32M96

ACT32M

CDIP – F

Tube

CD54ACT32F3A

CD54ACT32F3A

† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines

are available at www.ti.com/sc/package.

FUNCTION TABLE

(each gate)

INPUTS

OUTPUT

A

B

Y

H

X

H

X

HH

L

L

L

logic diagram (positive logic)

A

B

Y

Copyright

 2003, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

1

2

3

4

5

6

7

14

13

12

11

10

9

8

1A

1B

1Y

2A

2B

2Y

GND

4B

4A

4Y

3B

3A

3Y

CD54ACT32 ...F PACKAGE

CD74ACT32 ...E OR M PACKAGE

(TOP VIEW)

On products compliant to MIL-PRF-38535, all parameters are tested

unless otherwise noted. On all other products, production

processing does not necessarily include testing of all parameters.