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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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DAC7613E 데이터시트(PDF) 2 Page - Texas Instruments |
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DAC7613E 데이터시트(HTML) 2 Page - Texas Instruments |
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2 / 14 page  2 ® DAC7613 SPECIFICATION At TA = –40°C to +85°C, VDD = +5V, VSS = –5V, VREFH = +2.5V, and VREFL = –2.5V, unless otherwise noted. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. DAC7613E DAC7613EB NOTES: (1) If VSS = 0V, specification applies at code 00AH and above. (2) LSB means Least Significant Bit, when VREFH equals +2.5V and VREFL equals –2.5V, then one LSB equals 1.22mV. (3) Ideal output voltage, does not take into account zero or full-scale error. (4) If VSS = –5V, full-scale 5V step. If VSS = 0V, full-scale positive 2.5V step and negative step from code FFFH to 00AH. PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS ACCURACY Linearity Error(1) VSS = 0V or –5V ±2 ±1 LSB(2) Differential Linearity Error VSS = 0V or –5V ±1 ±1 LSB Monotonicity TMIN to TMAX 12 T Bits Zero-Scale Error Code = 000H ±4 T LSB Zero-Scale Drift 25 TT ppm/ °C Full-Scale Error Code = FFFH ±4 T LS Zero-Scale Error Code = 00AH, VSS = 0V ±8 T LSB Zero-Scale Drift VSS = 0V 5 10 TT ppm/ °C Full-Scale Error Code = FFFH, VSS = 0V ±8 T LSB Power Supply Rejection 30 T ppm /V ANALOG OUTPUT Voltage Output(3) VREFL = 0V, VSS = 0V 0 VREFH TT V VSS = –5V VREFL VREFH TT V Output Current –1.25 +1.25 TT mA Load Capacitance No Oscillation 100 T pF Short-Circuit Current +5, –15 T mA Short-Circuit Duration Indefinite T REFERENCE INPUT VREFH Input Range VSS = 0V or –5V VREFL + 1.25 +2.5 TT V VREFL Input Range VSS = 0V 0 VREFH – 1.25 TT V VREFL Input Range VSS = –5V –2.5 VREFH – 1.25 TT V DYNAMIC PERFORMANCE Settling Time(4) To ±0.012% 5 10 TT µs Output Noise Voltage 0Hz to 1MHz 40 T nV/ √Hz DIGITAL INPUT/OUTPUT Logic Family CMOS T Logic Levels VIH IIH ≤ ±10µA 0.7 VDD VDD + 0.3 TT V VIL IIL ≤ ±10µA –0.3 0.3 VDD TT V VOH IOH = –0.8mA 3.6 VDD TT V VOL IOL = 1.6mA 0.0 0.4 TT V Data Format Straight Binary T POWER SUPPLY REQUIREMENTS VDD 4.75 5.25 TT V VSS If VSS ≠ 0V –5.25 –4.75 TT V IDD 0.35 0.5 TT mA ISS –0.65 –0.45 TT mA Power Dissipation VSS = –5V 4 5.75 TT mW VSS = 0V 1.8 2.5 TT mW TEMPERATURE RANGE Specified Performance –40 +85 TT °C |
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