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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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DP83256 데이터시트(PDF) 68 Page - Texas Instruments |
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DP83256 데이터시트(HTML) 68 Page - Texas Instruments |
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68 / 146 page  50 Registers (Continued) 523 CURRENT LINK ERROR COUNT REGISTER (CLECR) The Current Link Error Count Register takes a snap-shot of the Link Error Monitor Counter during every Control Bus Interface read cycle of this register During a Control Bus Interface write cycle the Control Bus Write Command Reject bit (CCR) of the Interrupt Condition Register (ICR) will be set to 1 and will ignore a write cycle ACCESS RULES ADDRESS READ WRITE 16h Always Write Reject D7 D6 D5 D4 D3 D2 D1 D0 LEC7 LEC6 LEC5 LEC4 LEC3 LEC2 LEC1 LEC0 Bit Symbol Description D0 – D7 LEC0 – LEC7 LINK ERROR COUNT BIT k0–7l Snapshot of the Link Error Monitor Counter 67 |
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